With the recent development of VLSI (very large scale integrated) devices having a higher degree of integration than before, a great progress has been made in the technology of fabricating silicon wafer substrates. For example, the trench structure and multilayer interconnected structure have become indispensable. At present, the development of the so called three-dimensional IC is an urgent necessity for the realization of desirable VLSI devices of next generation. This IC has the multilevel structure composed of a semiconductor substrate and insulating layers and semiconductor layers formed one on top of the other, with the semiconductor layers electrically connected with one another through holes made in the insulating layers. The conventional semiconductor integrated circuits are produced by the technique which involves the formation of a semiconductor thin film by chemical vapor deposition (CVD) process.
There is a disadvantage for the conventional CVD process (such as low pressure CVD process and plasma CVD process) that it is rather poor in step coverage because the raw material is used in gaseous form and hence the raw material does not migrate well on the substrate surface. This is significant particularly in the case when a semiconductor thin film is formed on the substrate having an irregular surface. The poor step coverage causes troubles when a plurality of films are formed one over another. For example, the deposited film is broken or the elements are dislocated at the stepped part on the substrate surface. This makes it difficult to increase the degree of integration and deteriorates the yields. Moreover, the plasma CVD process has a disadvantage that the material is damaged by the bombardment of ions in the plasma.